1. Field of the Invention
Embodiments of the present invention generally relate to lithography systems used to print patterns or masks onto semiconductor wafers and, more particularly, to improving the acuity of pattern features printed thereby.
2. Description of the Related Art
In the photolithographic fabrication of integrated circuits, resist sensitive to radiant particle energy is exposed in predetermined patterns to define circuit features. In some cases, the energy is passed through masks which contain the patterns, thereby selectively exposing a photoresist on a semiconductor body. In other cases, the resist is on a mask substrate and the direction of the radiant energy itself is controlled to define patterns in the resist. Several sources of radiant energy have been used, including ultraviolet light, visible light, coherent light, x-rays and electron beams (E-Beams).
One system for photolithographic fabrication of integrated circuits is described in U.S. Pat. No. 4,796,038 entitled “Laser Pattern Generation Apparatus” which is assigned to the assignee of the present invention. In the system described therein, circuit patterns are written onto a workpiece by directing laser beams and moving a workpiece relative to the laser beams (e.g., while scanning the laser beams). In such systems, the intensity or dose of the laser beams at each exposed location is controlled by an array of pixels, commonly referred to as a pixel map, where the value of each pixel determines the dose at a corresponding exposed location. The dose or level of exposure is typically expressed as a grayscale value assigned to the corresponding pixel, typically zero to a maximum, where zero corresponds to a zero-dose or white, and the maximum value corresponds to a full-dose or black.
The pixel map is generated by a rasterization process in which a data file representing the pattern, such as a graphic design system (GDS) or MEBES format file, is transformed (using a component referred to as a “rasterizing engine”) into the individual pixel values by determining over or on which pixels the pattern lies. The data file typically represents the image in a hierarchical format with data identifying individual vertices of the pattern features. One example of a technique and circuitry for performing such a rasterization process is described in U.S. Pat. No. 5,553,170, entitled “Rasterizer for A Pattern Generation Apparatus,” which is assigned to the assignee of the present invention and incorporated herein by reference.
When writing a pattern with a lithography system, a number of boundary or edge effects, such as diffraction limited wavelength effects and electro-optical effects, for example, related to the power supplied in a radiated electron or laser beam, may result in defects in the actual written pattern. Factors in the writing process, such as sub-sampling techniques used in the rasterization process and the use of a Gaussian shaped beam for writing, may also contribute to these defects. These defects may include rounded corners and the shortening of lines due to non-sharp edges (commonly referred to as line end shortening).
One approach to compensate for rounded corners involves manipulating the data file to include additional geometries, in effect, to increase the area of exposure in proximity to the corner areas. This approach is illustrated in FIG. 1, which shows both the standard process flow 102 of rasterizing a data file 110S of a pattern 111, as well as a process flow 104 including such “geometry based” optical proximity correction (OPC). As illustrated, in the standard process flow 102, the data file 110S is converted to a bit map 120S by a rasterization process. Due to the aforementioned boundary effects, however, writing this pattern based on the bit map 120S may result in a final written pattern 130S having rounded corners 132S (for contrast, the ideal “sharp” corners 134 are shown as dashed lines). One metric used to quantify the rounding of corners, shown in the enlarged view of the rounded corner 132S in FIG. 1A, is the distance between the tip of the ideal corner and the nearest location on the actual rounded corner, commonly referred to as corner pull back (CPB).
In the geometry-based OPC process flow 104, the data file 110S is manipulated to add serifs 112 to the corners of the pattern 111, resulting in a new data file 110G, which is rasterized to form a new bit map 120G. Because of the serifs 112, this new bit map 120G will have additional pixels with non-zero values located in proximity to the pattern corners. As a result, writing the pattern based on bit map 120G may result in a written pattern 130G with corners 132G that are less rounded, having effectively been stretched outwardly toward the ideal corners 134, “regaining” corner area and, thus, reducing CPB.
Unfortunately, there are a number of disadvantages associated with this geometry-based OPC process. One disadvantage is that, due to the addition of the serifs 112, the number of corners that must be represented increases and the data file 110G may grow proportionally. For example, in the simple example illustrated in FIG. 1, the original shape 111 has only four (convex) corners. However, each serif 112 adds an additional two outer (convex) corners and two inner (concave) corners to each original corner of the pattern 111. As previously described, these corners are typically expressed as vertices in the data file 110G, and hence these additional corners may cause the data file 110G to grow by a factor of five as a result. As the data file 110G grows, the amount of time required to transfer the pattern data to the rasterizer and, hence, overall processing time (time to print), may grow proportionally.
Another disadvantage associated with geometry-based OPC is that, depending on the rasterization engine, certain ideal pixel configurations that may better correct for some defects may be unachievable through the addition of simple geometries, such as serifs 112. A related disadvantage is that even if more complex geometries are added in an effort to achieve a desired pixel configuration, the data file will likely grow accordingly, thus exacerbating the previously described problems with data transfer.
Accordingly, there is a need for improved techniques for correcting defects, such as rounded corners, in patterns written by lithography. Preferably, such techniques will result in little or no impact on data transfer.